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/Title (EVBUM2072DB - NB4N121KMNGEVB Evaluation Board User's Manual)
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2019-11-29T14:22:40+08:00
BroadVision, Inc.
2019-11-29T14:23:15+08:00
2019-11-29T14:23:15+08:00
Acrobat Distiller 19.0 (Windows)
application/pdf
EVBUM2072DB - NB4N121KMNGEVB Evaluation Board User's Manual
ON Сֲ
The NB4N121K Evaluation Board was designed to
provide a flexible and convenient platform to quickly
evaluate, characterize and verify the performance and
operation of the device under test NB4N121K.
The NB4N121K is a Clock differential input fanout
distribution device with 1 to 21 HCSL level differential
outputs, optimized for ultra low propagation delay variation.
The NB4N121K is designed with HCSL clock distribution
for FBDIMM applications in mind. Inputs can accept
differential LVPECL, CML, or LVDS levels. Single−ended
LVPECL, CML, LVCMOS or LVTTL levels are accepted
with the proper VREFAC supply. Clock input pins
incorporate an internal 50 on die termination resistors.
Output drive current at IREF (Pin 1) for 1X load is selected
by connecting a 0 k to 1 k external resistor to GND. To
drive a 2X load, connect the IREF Pin 1 through 20 k to 50
k external resistors. The NB4N121K specifically
guarantees low output–to–output skews. Optimal design,
layout, and processing minimize skew within a device and
from device to device. System designers can take advantage
of the NB4N121K’s performance to distribute low skew
clocks across the backplane or the motherboard. The device
is packaged in a low profile 8 x 8 mm 52−pin QFN package.
This user’s manual provides detailed information on the
board’s contents, layout and use. The manual should be used
in conjunction with the NB4N121K data sheet which
contains full technical details on device specifications and
operation.
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